1. Field
Embodiments described herein relate generally to a nonvolatile semiconductor memory device.
2. Description of the Related Art
As one of the electrically-rewritable nonvolatile semiconductor memories (EEPROMs), a NAND-type EEPROM that can be highly integrated is well known. In the NAND-type EEPROM, data rewriting is normally performed by injecting electrons into and releasing electrons from a floating gate via an oxide film much thinner than the gate oxide film that is used in a conventional MOSFET. Higher-density EEPROMs have been realized through miniaturization achieved by the advanced processing technology and device technology. However, the miniaturization of the EEPROMs of the floating gate type is approaching its limit these days.
In view of this, resistive memory devices have attracted increased attention as a likely candidate for replacing semiconductor memory devices that use a MOSFET as a memory cell. As described herein, it is assumed that the resistive memory devices include Resistive RAM (ReRAM), in a narrow sense, that uses a transition metal oxide as a recording layer and stores its resistance states in a non-volatile manner, as well as Phase Change RAM (PCRAM) that uses chalcogenide or the like as a recording layer to utilize the resistance information of crystalline states (conductors) and amorphous states (insulators), and so on.
Two kinds of types of variable resistive elements in resistive memory devices are known. In one kind, known as a bipolar type, a high-resistance state and a low-resistance state are set by switching a polarity of an applied voltage. In the other kind, known as a unipolar type, setting of the high-resistance state and the low-resistance state are made possible by controlling a voltage value and a voltage application time, without switching the polarity of the applied voltage.
The unipolar type is preferable for realizing a high-density memory cell array. This is because, in the case of the unipolar type, the cell array can be configured by overlapping a variable resistive element and a rectifier element such as a diode at intersecting portions of bit lines and word lines, without using a transistor. Furthermore, arranging such memory cell arrays three-dimensionally in stacks enables a large capacity to be realized without causing an increase in cell array area.
In the case of unipolar type ReRAM, write of data to a memory cell is performed by applying for a short time to the variable resistive element a certain voltage. As a result, the variable resistive element changes from the high-resistance state to the low-resistance state. Hereinafter, this operation to change the variable resistor from the high-resistance state to the low-resistance state is called a setting operation. In contrast, erase of data in a memory cell is performed by applying for a long time to the variable resistive element in the low-resistance state subsequent to the setting operation a certain voltage lower than that applied during the setting operation. As a result, the variable resistive element changes from the low-resistance state to the high-resistance state. Hereinafter, this operation to change the variable resistive element from the low-resistance state to the high-resistance state is called a resetting operation.
Where confidential data (such as telephone numbers and personal identification numbers) is stored with the use of nonvolatile memory cells as in a NAND-type EEPROM or a resistive memory device, the data needs to be undisclosed for confidentiality reasons, and should not be easily read from outside. Therefore, various measures have been taken. For example, confidential data is encrypted, reading is allowed only by a special command, or physical partitions are provided (see Japanese Patent Application Laid-Open Nos. 2-62630 and 2002-229809, for example).
With the use of encryption or a special command, data stored in a confidential data region can be protected from outside. In such a case, however, a special circuit region to cope with encryption or a special command needs to be provided inside the chip. To further improve the protection performance for confidential data, the circuit becomes more and more complicated, and the proportion of the circuit in the chip becomes larger. As a result, the chip size becomes larger.